说明

The TMS320VC5501 (5501) fixed-point digital signal processor (DSP) is based on the TMS320C55x™ DSP generation CPU processor core. The C55x™ DSP architecture achieves high performance and low power through increased parallelism and total focus on reduction in power dissipation. The CPU supports an internal bus structure that is composed of one program bus, three data read buses, two data write buses, and additional buses dedicated to peripheral and DMA activity. These buses provide the ability to perform up to three data reads and two data writes in a single cycle. In parallel, the DMA controller can perform data transfers independent of the CPU activity.

The C55x™ CPU provides two multiply-accumulate (MAC) units, each capable of 17-bit × 17-bit multiplication in a single cycle.

特性

• High-Performance, Low-Power, Fixed-Point TMS320C55x™ Digital Signal Processor (DSP)
  • 3.33-ns Instruction Cycle Time for 300-MHz Clock Rate
  • 16K-Byte Instruction Cache (I-Cache)
  • One/Two Instructions Executed per Cycle
  • Dual Multipliers [Up to 600 Million Multiply-Accumulates Per Second (MMACS)]
  • Two Arithmetic/Logic Units (ALUs)
  • One Program Bus, Three Internal Data/Operand Read Buses, and Two Internal Data/Operand Write Buses
• Instruction Cache (16K Bytes)
• 16K × 16-Bit On-Chip RAM That is Composed of Four Blocks of 4K × 16-Bit Dual-Access RAM (DARAM) (32K Bytes)
• 16K × 16-Bit One-Wait-State On-Chip ROM (32K Bytes)
• 8M × 16-Bit Maximum Addressable External Memory Space
• 32-Bit External Parallel Bus Memory Supporting External Memory Interface (EMIF) With General-Purpose Input/Output (GPIO) Capabilities and Glueless Interface to:
  • Asynchronous Static RAM (SRAM)
  • Asynchronous EPROM
  • Synchronous DRAM (SDRAM)
  • Synchronous Burst RAM (SBRAM)
• Emulation/Debug Trace Capability Saves Last 16 Program Counter (PC) Discontinuities and Last 32 PC Values
• Programmable Low-Power Control of Six Device Functional Domains
• On-Chip Peripherals
  • Six-Channel Direct Memory Access (DMA) Controller

说明

The UCC28810 and UCC28811 are general lighting power controllers for low to medium power lumens applications requiring power factor correction and EMC compliance. It is designed for controlling a flyback, buck or boost converter operating in critical conduction mode. It features a transconductance voltage amplifier for feedback error processing, a simple current reference generator for generating a current command proportional to the input voltage, a current-sense (PWM) comparator, PWM logic and a totem-pole driver for driving an external FET.

In the critical conduction mode operation, the PWM circuit is self-oscillating with the turn-on being governed by a transformer zero energy detector (TZE pin) and the turn-off being governed by the current sense comparator.

特性

• Transition Mode Controller for Low Implementation Cost of AC Input LED Lighting Applications
• Implements Single Stage Power Factor Corrected LED Driver
• Enhanced Transient Response With Slew-Rate Comparator
• Interfaces with Traditional Wall Dimmers
• Accurate Internal V_REF for Tight Output Regulation
• Two UVLO Options
• Overvoltage Protection (OVP), Open-Feedback Protection and Enable Circuits
• ±750-mA Peak Gate Drive Current
• Low Start-Up and Operating Currents
• Lead (Pb)-Free Packages
• APPLICATIONS
  • AC Input General Lighting Applications Using HB LEDs
  • Industrial, Commercial and Residential Lighting Fixtures
  • Outdoor Lighting: Street, Roadway, Parking, Construction and Ornamental LED Lighting Fixtures

All trademarks are the property of their respective owners.

特性

• Available in the Texas InstrumentsNanoStar™ and NanoFree™ Packages
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 3.7 ns at 3.3 V
• Low Power Consumption, 10-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• I_off Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

NanoStar, NanoFree are trademarks of Texas Instruments.

DESCRIPTION/ORDERING INFORMATION

This bus buffer gate is designed for 1.65-V to 5.5-V V_CC operation.

The SN74LVC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

说明

These octal bus transceivers are designed for 2-V to 5.5-V V_CC operation.

The ’LV245A devices are designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

特性

• 2-V to 5.5-V V_CC Operation
• Max t_pd of 6.5 ns at 5 V
• Typical V_OLP (Output Ground Bounce)
     <0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
     >2.3 V at V_CC = 3.3 V, T_A = 25°C
• Supports Mixed-Mode Voltage Operation on All Ports
• I_off Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

说明

The ’HC148 devices feature priority decoding of the inputs to ensure that only the highest-order data line is encoded. These devices encode eight data lines to 3-line (4-2-1) binary (octal). Cascading circuitry (enable input EI and enable output EO) has been provided to allow octal expansion without the need for external circuitry. Data inputs and outputs are active at the low logic level.

特性

• Wide Operating Voltage Range of 2 V to 6 V
• Outputs Can Drive Up To 10 LSTTL Loads
• Low Power Consumption, 80-µA Max I_CC
• Typical t_pd = 16 ns
• ±4-mA Output Drive at 5 V
• Low Input Current of 1 µA Max
• Encode Eight Data Lines to 3-Line Binary (Octal)
• Applications Include:
  • n-Bit Encoding
  • Code Converters and Generators

说明

This 16-bit (dual-octal) noninverting bus transceiver contains two separate supply rails. B port has V_CCB, which is set to operate at 3.3 V and 5 V. A port has V_CCA, which is set to operate at 2.5 V and 3.3 V. This allows for translation from a 2.5-V to a 3.3-V environment, and vice versa, or from a 3.3-V to a 5-V environment, and vice versa.

The SN74ALVC164245 is designed for asynchronous communication between data buses. The control cirucitry (1DIR, 2DIR, 1OE\, and 2OE\) is powered by V_CCA.

To ensure the high-impedance state during power up or power down, the output-enable (OE)\ input should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

特性

• Member of the Texas Instruments Widebus™ Family
• Max t_pd of 5.8 ns at 3.3 V
• ±24-mA Output Drive at 3.3 V
• Control Inputs V_IH/V_IL Levels Are Referenced to V_CCA Voltage
• Latch-Up Performance Exceeds 250 mA Per JESD 17

NOTE: New and improved versions of the SN74ALVC164245 are available. The new part numbers are SN74LVC16T245 and SN74LVCH16T245 and should be considered for new designs.

Widebus is a trademark of Texas Instruments.

说明

This 16-bit (dual-octal) noninverting bus transceiver contains two separate supply rails. B port has V_CCB, which is set to operate at 3.3 V and 5 V. A port has V_CCA, which is set to operate at 2.5 V and 3.3 V. This allows for translation from a 2.5-V to a 3.3-V environment, and vice versa, or from a 3.3-V to a 5-V environment, and vice versa.

The SN74ALVC164245 is designed for asynchronous communication between data buses. The control cirucitry (1DIR, 2DIR, 1OE\, and 2OE\) is powered by V_CCA.

To ensure the high-impedance state during power up or power down, the output-enable (OE)\ input should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

特性

• Member of the Texas Instruments Widebus™ Family
• Max t_pd of 5.8 ns at 3.3 V
• ±24-mA Output Drive at 3.3 V
• Control Inputs V_IH/V_IL Levels Are Referenced to V_CCA Voltage
• Latch-Up Performance Exceeds 250 mA Per JESD 17

NOTE: New and improved versions of the SN74ALVC164245 are available. The new part numbers are SN74LVC16T245 and SN74LVCH16T245 and should be considered for new designs.

Widebus is a trademark of Texas Instruments.

特性

• Output Voltage Range Adjustable From 1.25 V to 37 V
• Output Current Greater Than 500 mA
• Internal Short-Circuit Current Limiting
• Thermal-Overload Protection
• Output Safe-Area Compensation
• Q Devices Meet Automotive Performance Requirements
• Customer-Specific Configuration Control Can Be Supported for Q Devices Along With Major-Change Approval

PowerFLEX Is a trademark of Texas Instruments

DESCRIPTION/ORDERING INFORMATION

The LM317M is an adjustable 3-terminal positive-voltage regulator capable of supplying more than 500 mA over an output-voltage range of 1.25 V to 37 V. The LM317M is exceptionally easy to use and requires only two external resistors to set the output voltage. Furthermore, both line and load regulation are better than standard fixed regulators.

In addition to having higher performance than fixed regulators, the device includes on-chip current limiting, thermal-overload protection, and safe-operating-area protection. All overload protection remains fully functional if the ADJUST terminal is disconnected.

Normally, no capacitors are needed unless the device is more than six inches from the input filter capacitors, in which case an input bypass capacitor is needed. An optional output capacitor can be added to improve transient response. The ADJUST terminal can be bypassed to achieve high ripple-rejection ratios, which are difficult to achieve with standard three-terminal regulators.