特性

• Available in the Texas InstrumentsNanoStar™ and NanoFree™ Packages
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 3.7 ns at 3.3 V
• Low Power Consumption, 10-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• I_off Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

NanoStar, NanoFree are trademarks of Texas Instruments.

DESCRIPTION/ORDERING INFORMATION

This bus buffer gate is designed for 1.65-V to 5.5-V V_CC operation.

The SN74LVC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.